Energy-efficient on-chip learning for a fully connected neural network using domain wall device

Journal article

Anubha Sehgal, Seema Dhull, Sourajeet Roy, Brajesh Kumar Kaushik
OPTO, 2023

Cite

APA Click to copy
Sehgal, A., Dhull, S., Roy, S., & Kaushik, B. K. (2023). Energy-efficient on-chip learning for a fully connected neural network using domain wall device. OPTO.

Chicago/Turabian Click to copy
Sehgal, Anubha, Seema Dhull, Sourajeet Roy, and Brajesh Kumar Kaushik. “Energy-Efficient on-Chip Learning for a Fully Connected Neural Network Using Domain Wall Device.” OPTO (2023).

MLA Click to copy
Sehgal, Anubha, et al. “Energy-Efficient on-Chip Learning for a Fully Connected Neural Network Using Domain Wall Device.” OPTO, 2023.

BibTeX Click to copy

@article{anubha2023a,
  title = {Energy-efficient on-chip learning for a fully connected neural network using domain wall device},
  year = {2023},
  journal = {OPTO},
  author = {Sehgal, Anubha and Dhull, Seema and Roy, Sourajeet and Kaushik, Brajesh Kumar}
}

Abstract

Spintronic devices have received lots of attention recently due to their potential to provide a solution for the presentday challenge of increased power dissipation. Among spintronic devices, domain-wall synaptic devices are speed and energy efficient for solving image classification, speech recognition, and other problems. In this paper, a fully connected neural network (FCNN) is implemented using energy-efficient domain wall-based synaptic devices and transistor-based feedback circuits. The designed FCNN is trained on-chip for the classification of Fisher's Iris dataset. The proposed neural network achieves an accuracy of 95%. The proposed FCNN is 96% and 83.3% efficient in terms of energy and latency respectively when compared to previously proposed hardware for on-chip learning